MUNICH, Germany — Jianwen Zhu, a professor at the University of Toronto, proposed a new register-transfer level (RTL) abstraction syntax which he claimed can be implemented by a modest extension to ...

SAN FRANCISCO — Electronic system level (ESL) EDA vendor Tenison Design Automation Monday (Feb. 20) announced VHDL and mixed Verilog/VHDL language support for its VTOC product. According to Tenison ...

The concept of system architectural definition at a level of abstraction higher than RTL is a good one. Such methodologies become much more feasible as tools roll out in support. To that end, Synopsys ...